時 間：97年2月26日（星期二）9:00至11:30 地 點：工研院9館010會議室 (新竹縣竹東鎮中興路四段195號，電話︰03-5918062) 主辦單位：工業技術研究院電子與光電研究所 協辦單位：先進微系統與構裝技術聯盟 講 師： Dr. Chuan Seng Tan, Research Fellow, Nanyang Technological University, Singapore • Dr. Tan received his B.Eng. degree in electrical engineering from University of Malaya, Malaysia, in 1999. Subsequently, he completed his M.Eng. degree in advanced materials from the National University of Singapore under the Singapore-MIT Alliance (SMA) program in 2001. • In the fall of 2001, he began his doctoral work at the Massachusetts Institute of Technology, Cambridge, USA, and was awarded a Ph.D. degree in electrical engineering in 2006. • Currently he is a research fellow in Nanyang Technological University, Singapore, under the support of the Lee Kuan Yew Postdoctoral Fellowship. • He is working on process technology of three-dimensional integrated circuits (3-D ICs). He co-edited a book entitled “Wafer Level 3-D ICs Process Technology,” scheduled to be published by Springer in June 2008.
議 程： 08:45~09:00 Registration 09:00~09:10 Opening 09:10~11:30 • Introduction to Wafer Level 3-D Integration • Technology Platform • Examples of 3-D Processes and Applications • Q & A
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